Evaluating Uniform Memory Access Mode on AMD's Turin ft. Verda (formerly DataCrunch.io)
… On the other hand, workloads that hit DRAM a lot suffer in NPS0 mode. 502.gcc, 505.mcf, and 520.omnetpp see the EPYC 9575F’s higher clock speed count for nothing, and the higher clocked chip underperforms compared to 4.4 GHz setups with lower DRAM latency. …