… Graph by TSMC will be able to use EUV on 14 layers, a substantial improvement over EUV at 7nm, which will only use that technology on four non-critical layers contacts and vias . “TSMC’s 5-nanometer technology offers our customers the industry’s most advanced logic process to address the exponentia… …
… Here's how TSMC's CC Wei described it in TSMC's last quarterly conference call. O ur strategy is continuously to improve every node in the performance, such as 28 nanometer. And are continuing to improve the 16 nanometers technology. …
… The company recently showed its 3nm technology Opens in a new window to President Biden in South Korea. The transition from FinFET to GAA transistors is just over the horizon. Image: Samsung One of the reasons TSMC won't be moving to 2nm in the near future is it plans to use 3nm for quite some time. …
… Earlier this month, rumors surfaced that TSMC might significantly expand the facility. Now, we're hearing that the Taiwanese foundry might deploy 3nm technology in lieu of 5nm. …
… According to the story, Intel will specifically license the 6nm variant of TSMC's 7nm technology that the company announced last year. 6nm is expected to deliver a density improvement over 7nm/7nm+, though TSMC has not disclosed improvements on power or performance compared with the other node. …
… Jensen also said his company's relationship with TSMC took years to cultivate, and it's hard when both companies have hundreds of partners. "TSMC is a services company that dances with, what, 300 companies worldwide? …
… In short, with its 22nm Ivy Bridge parts, it now looks like Intel might have extended its technology lead to almost three years. It will be 2014 at the earliest before TSMC debuts its 20nm process, and I would be surprised if it's 2015 before we see real, mass-market production. …
… The gist of the paper's argument is that the US tricked TSMC to invest in its Arizona fab. This would allow it to steal the most cutting-edge technology from "our Taiwan." That is a reference to China's claim of sovereignty over the tiny island. …
… TSMC has even mentioned that it might build a 12nm half node in a recent conference call. From Seeking Alpha Opens in a new window : our strategy is continuously to improve every node in the performance, such as 28 nanometer. And are continuing to improve the 16 nanometers technology. …
… The company claims the hybrid bonding method developed by TSMC offers a 3x improvement in interconnect efficiency and a whopping 15x improvement compared to a traditional microbump array. TSMC is using its SoIC System of Integrated Chips technology to connect the various dies together. …