…also integrates into a standard ASIC or FPGA flow with no analog bring-up procedures, and it can drop directly into FPGA-based prototyping platforms for a smooth design workflow. These soft…
…AI and machine learning performance High-performance computing applications Future GPU architecture development Industry-leading optimization techniques The role combines deep technical compiler work with collaborative hardware-software co-design, making it…
…Services Experience with Designing multi-tiered and integrated software systems Software project management experience covering overall software development life cycle and familiarity with Agile/SCRUM practices Experience working with existing software stack…
…making integration even easier. We’re also optimizing performance and efficiency for emerging workload patterns as HPC and AI workflows converge. The roadmap is driven by feedback. And working closely with our…
…skills, with a collaborative and proactive work style Strong analytical thinking, hands-on debugging skills, and an eagerness to learn and share expertise within the team Demonstrated ability to work effectively in…
…Subtle issues like timing mismatches, equalization failures, and signal integrity problems remain hidden until late post-silicon testing. Testing real-world interoperability, especially with diverse third-party hardware and drivers, is not…
…Develop MLIR based compiler technology for deep learning workloads on Intel NPUs. Develop AI execution middleware based on Intel OpenVINO toolkit. Develop large-scale production software with validation and continuous integration in…
…The Ultra Ethernet Consortium (UEC) and UALink are aligning electrical interface specifications with AI-scale fabric requirements, while the Storage Networking Industry Association (SNIA) is hosting workshops to converge perspectives from AI…
…requirements and technical specifications Work directly with scientists and engineers on high-performance computing applications and supercomputer implementations Partner with hardware teams to optimize software-hardware integration for maximum performance Performance Optimization…
…At this year’s DVCon US, we launched a partnership with Moores Lab AI to create the first AI-driven SoC verification flow integrating our Trek Test Suite Synthesis with Moores Lab…